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Post by account_disabled on Feb 23, 2018 10:10:43 GMT
Hi, I am trying to develop a 32-bit Viterbi decoder. I am currently using the Viterbi decoder from the FPGA RF Communications Library available here. However, I can't seem to get it right. The 'decoded bit' output of the Viterbi decoder VI is always zero, no matter what the encoded symbol is. I put the VI inside a while loop while constantly inputting two-bit encoded input inside the VI. The VI I am using is posted in the picture and the project I developed is in the zip file! Please help. Thanks! I didn't find the right solution from the Internet. References: forums.ni.com/t5/20814Cloud backup solution marketing
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